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Freescale Semiconductor /MK61F15WS /DDR /CR08

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Interpret as CR08

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TRAS)TRAS 0RESERVED0TRASDI0TWR0RESERVED 0TDAL0RESERVED

Description

DDR Control Register 8

Fields

TRAS

Time RAS lockout
RESERVED

Reserved
TRASDI

Time RAS-to-CAS Delay Interval
TWR

Time Write Recovery
RESERVED

Reserved
TDAL

no description available
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data